From buffered HF baths that dissolve oxides at ~0.1–0.25 µm/min to plasma recipes carving 100‑micron trenches, etching is where semiconductor patterns become hardware—and where real‑time metrology now calls the stop. A multibillion‑dollar equipment market is racing to deliver higher selectivity, tighter control, and cleaner waste streams.
Industry: Semiconductor | Process: Etching
In semiconductor fabs, “etch” is the moment of truth—when material is removed to transfer lithography patterns into films and silicon. Two families dominate: wet etching, which uses liquid chemicals and is inherently isotropic (etches equally in all directions), and dry etching, which uses plasmas to add directionality via ion bombardment and achieve anisotropy (etching more in one direction than others). The choice, chemistry, and control of etch rate and selectivity decide whether lines are crisp, sidewalls are vertical, and masks survive.
Fabs increasingly rely on in‑situ monitoring to hit endpoints in real time. As Lam Research puts it, if an etch overruns its target layer, underlying layers or the wafer itself can be damaged, devastating yield (Lam Research).
Wet etching: chemistry, rates, selectivity
Wet etching dissolves target materials in liquid chemicals. It is inherently isotropic unless exploiting crystallographic anisotropy, such as KOH etching of silicon (faster on {100} than {111} planes) to form V‑grooves or nearly vertical walls for MEMS; these alkaline etchants (KOH, TMAH) are generally avoided for IC device layers (halbleiter.org).
Material selectivity is the wet bench’s superpower. Buffered HF—HF with NH₄F—etches SiO₂ much faster than Si or Si₃N₄, enabling selectivity often greater than 100:1 (Plasma‑Therm) (halbleiter.org). The core reaction dissolving oxide is SiO₂ + 6HF → H₂SiF₆ + 2H₂O (forming soluble hexafluorosilicic acid) (MicroTechWeb). Standard recipes give controllable rates: a 6:1 NH₄F:HF buffered HF (BHF) solution etches thermal oxide at ≈0.1–0.25 µm/min at room temperature; TEOS and PECVD oxides etch even faster (up to ~350 nm/min) due to lower density (MicroTechWeb).
Byproducts stay in solution—H₂SiF₆ in HF, soluble silicates in KOH—and must be rinsed away (MicroTechWeb) (halbleiter.org). Advantages include high throughput (batch tools), superb selectivity (>100:1 often), lower equipment cost, and easy chemical tuning; trade‑offs include poor anisotropy/uniformity (mask undercut), liquid access limits, and hazards from caustics and HF (MDPI) (halbleiter.org). Temperature, concentration, and agitation method (spray vs immersion) are the control knobs, and the etch rate typically increases with temperature—tight temperature control matters (halbleiter.org).
Maintaining those chemistries hinges on precise dosing. Wet benches commonly pair acid baths with accurate chemical dosing hardware such as a dosing pump to keep HF and NH₄F ratios steady during long runs.
Dry etching: plasma regimes and profiles
Dry etching uses low‑pressure plasmas to generate reactive radicals and ions. At higher pressures (~10⁻¹–10² Torr), “plasma etch” has a short mean free path; species collide often and arrive at the wafer from varied angles, so removal is mostly chemical and isotropic. Fluorine radicals from SF₆ or CF₄ attack Si to form volatile SiF₄, useful for cleaning or blanket etch but rarely for directional pattern transfer (MDPI).
Reactive‑ion etching (RIE) runs at ~10⁻³–10⁻¹ Torr with an RF bias. Energetic ions gain directed momentum and bombard vertically while radicals form volatile byproducts—combining the traits of plasma etch and ion milling to achieve anisotropic profiles with chemical selectivity (MDPI). Chemistries follow the layer: SiO₂/nitrides use F‑based gases; Si/Ge often use Cl‑based; metals use Cl₂, BCl₃, or fluorocarbons as needed (Semiconductor Engineering). Rates range from a few tens of nm/min up to ~µm/min, but slow for deep or high‑aspect features due to “loading effects” (reactant diffusion limits) (MDPI).
High‑density plasmas (ICP, ECR) decouple ion energy and density to enable deep reactive‑ion etching (DRIE). The Bosch process alternates SF₆ etch with C₄F₈ passivation, achieving 100 µm+ depths and aspect ratios >15:1. A commercial PlasmaTherm DRIE tool reaches ~20 µm/min on Si with nearly vertical, scallop‑free walls—vital for MEMS and through‑silicon vias, albeit via complex cycling (MDPI). Ion milling at very low pressure is the other extreme—purely physical, extremely anisotropic, and non‑selective—so it is rarely used for critical IC etches (MDPI). In practice, most modern IC features use RIE/ICP, while wet etch is reserved for bulk removal or cleaning where anisotropy is unneeded.
Reaction pathways and byproducts
Etching is fundamentally chemical—plasma or not—with products that must either dissolve (wet) or volatilize (dry). In wet etch: HF forms soluble hexafluorosilicates when attacking SiO₂; BHF (6:1 NH₄F:HF) runs ~100–250 nm/min at room temperature; hot KOH/TMAH etches Si via hydroxyl attack with strong crystallographic dependence, with (100) planes ~100× faster than (111) (MicroTechWeb) (halbleiter.org). Si₃N₄ needs powerful oxidizers/acids (e.g., hot H₃PO₄) with low rates; aluminum alloys dissolve in mixed acids (H₃PO₄:HNO₃:CH₃COOH) with controlled undercut; copper uses peroxide‑based or ammoniacal oxidants; photoresist strips in oxidizing SPM (H₂SO₄:H₂O₂) or in O₂ plasma, leaving CO₂/H₂O.
In plasma etch: F atoms in SF₆ or CF₄ plasmas form volatile SiF₄ from Si, with oxygen additives turning carbon into CO₂; SiO₂ removal is largely chemical (SiO₂ + 4F → SiF₄ + O₂). Cl₂ or BCl₃ plasmas form SiClₓ or metal chlorides such as AlCl₃ or NiCl₂; adding oxygen can scavenge polymers or assist removal. Fluorocarbons (CF₄, CHF₃) deposit passivation to tailor sidewalls (as in Bosch). Inert Ar plasmas enable sputter‑only ion milling. Atomic‑layer etch is emerging: it alternates reactant adsorption (e.g., Cl₂) with brief ion bombardment to remove about a monolayer—akin to ALD, but subtractive. Byproducts in dry etch must be volatile or readily pumped; residues that are not can cause defects (MDPI).
Rate, selectivity, and loading control
Etch rate (depth per time) and selectivity (etch rate ratio between materials) are the two headline metrics (Plasma‑Therm). Precision features commonly run at tens to hundreds of nm/min; deep trenches can push into µm/min regimes (MDPI) (MDPI). Yet rates often fall as aspect ratio grows due to transport limits; one study notes etch rates can decrease by >50% when exposed area exceeds ~10% of the wafer (MDPI). Typical deep RIE into Si may run ~500 nm/min at aspect ratio ~5:1, while cryogenic SiO₂ etch might be <100 nm/min (MDPI).
Selectivity determines mask survivability and stop‑layer integrity. As nodes scale and resist budgets shrink, even 2:1 selectivity can be insufficient; imec reports requirements leapt from ~2:1 to ~10:1 over just a few generations—a 4–5× challenge (Semiconductor Engineering). Recipes tune gas ratios, pressure, bias, and chamber conditions; end‑point detection minimizes over‑etch. In practice, fabs often trade maximum rate for uniformity, profile control, and repeatability.
Wet stations that neutralize or buffer chemistry during long etches use precise feed control. Integrating a dosing pump to meter acids and bases is a routine control layer that helps hold etch rate and selectivity steady without excursions.
In‑situ monitoring and endpoint detection
Because ex‑situ measurements cannot prevent an overdosed etch, fabs embed metrology in the chamber. Optical emission spectroscopy (OES) watches plasma light via a viewport; as the top layer clears, emission lines from gases or byproducts change, and thresholds or multivariate models call endpoint. OES is non‑invasive and widely used for endpoint detection (ResearchGate) (Lam Research).
Laser reflectometry/ellipsometry tracks film thickness via interference fringes; Samara et al. (2015) even demonstrated an in‑situ interferometer using the plasma’s own emission between electrodes to monitor uniformity (ResearchGate). Acoustic pickups and RF current/voltage or pressure signals can also indicate progress. Newer work goes further: Kang et al. (2025) showed simple RGB images of the wafer surface, paired with neural networks, can predict etch depth with high accuracy—“virtual sensors” promising low‑cost, non‑invasive real‑time metrology (arXiv).
With nearly half of all fab process steps involving plasma etching, integrated endpoint control is now standard (Semiconductor Engineering). As one Lam technologist notes, in‑situ tools are critical because standalone metrology cannot prevent an overdosed etch; built‑in sensors enable real‑time process corrections (Lam Research).
Market sizing and vendor priorities
The etch equipment segment is solidly multibillion‑dollar. One forecast pegs etch tools at $24.7 billion in 2024, rising to ~$26.8 billion in 2025 (≈8.6% YoY growth), with ~3–4% CAGR through 2032 (Stratview Research). For context, total wafer‑fab capital equipment sales were ≈$100 billion in 2024, with China accounting for ~$41 billion (Reuters). Dry etch and cleaning tools are cited as especially high‑growth areas, tied to 3D NAND, FinFETs, and EUV process complexity (Reuters).
Toolmakers—Lam, Applied, TEL, among others—report that newer nodes require ever‑higher selectivities and precision (Semiconductor Engineering). Manufacturers are speeding process development with modeling and ML; one major foundry saved months of etch testing by employing predictive models (Semiconductor Engineering).
Environmental handling and waste trains
Chemical handling is central to etching. Key etchants like HF, HCl, H₂SO₄, and NH₄OH are regulated as hazardous in most jurisdictions. In Indonesia, such substances fall under “B3” hazardous substance regulations (Government Reg. 74/2001 implementing Environmental Law 32/2009) (Enviliance). HF, notably, constitutes about 40% of a chip fab’s hazardous releases—driving recycling or neutralization strategies (e.g., precipitating CaF₂) before disposal (MDPI).
Modern fabs feature dedicated neutralization (pH control), scrubbing, and filtration. For precipitation and solids separation, facilities often route streams through a clarifier and follow with depth media like a sand/silica filter to capture fines. Corrosive point‑of‑use filtration may be housed in 316L stainless, such as an SS cartridge housing, within broader water‑treatment ancillaries built for chemical duty.
Bottom line: precision, yield, and profiles
Uniform, precise etch profiles underpin electrical performance—think gate‑fin width or via depth—while high selectivity reduces mask cost and defectivity. The push from ~2:1 to ~10:1 selectivity in just a few generations (imec) magnifies the challenge by 4–5× (Semiconductor Engineering). In turn, real‑time endpointing and in‑situ feedback—OES lines bending, interferometry fringes shifting—have become the on‑ramp to high yield.
Across wet and dry methods, the playbook is consistent: chemistry that forms soluble or volatile byproducts; control of etch rate and selectivity; and sensors that stop on a dime. With plasma etching touching nearly half of fab steps and etch tools at $24.7 billion in 2024 on their way to ~$26.8 billion in 2025 (≈8.6% YoY, ~3–4% CAGR through 2032), the industry is investing in the precision needed to keep those sidewalls straight—and those wafers in spec (Semiconductor Engineering) (Stratview Research).
